Support ECAD Data & BOM
VayoPro- Test Expert supports most existing PCB CAD, intelligently identify CAD format. Extra Gerber data source (solder mask layer) can also be imported.
2020 官网升级中!现在您访问官网的浏览器设备分辨率宽度低于1280px请使用高分辨率宽度访问。
VayoPro-Test Expert is an intelligent design for test (DFT) and test programming software solution for electronics manufacturing testing process requirements, it can accomplish the PCB test coverage analysis and help ICT/flying probe test programming.
Generating a comprehensive testability analysis report
Offering a streamlined and efficient approach to test strategy analysis
Optimizing the selection of test probes to reduce fixture manufacturing costs
Implementing flexible parameter settings to expedite test program developmentTest Expert offers comprehensive testability report output, covering from parts coverage report, accessible net report, inaccessible net report, insufficient probes for accessible net, parallel report. It supports output in different format like text, Excel, PDF & html.
Test Expert evaluates the coverage of manufacturing defects by different testing methods (ICT, AOI, AXI...). Offering perspective on different manufacturing defects covered by different test method including missing parts, open circuits, short circuits, polarity errors, etc., making it easier to decide which test method to use.
Test Expert can generate various MDA/ICT/ATE/AXI/AOI/flying nail fine testing programs, supporting testing equipment such as Keysight/Agilent, Teradyne/GenRad, TRI, Hioki, SRC, Takaya, Seica, etc., helping test engineers program efficiently.
VayoPro- Test Expert supports most existing PCB CAD, intelligently identify CAD format. Extra Gerber data source (solder mask layer) can also be imported.
Test Expert has powerful built-in testing nail selection rules, flexible and rich parameter setting functions, and can set detailed rule details (size, distance, type, quantity, priority, forced position, etc.). It can also set multiple nail selection rule series and generate different results for comparing differences. Meanwhile, its advanced testing optimization algorithm can also ensure the best nail selection results.
Test Expert supports multiple ways to query test nail selection results, such as by reason for inaccessible node, network name/number, test nail number etc. You can easily review interactively.
In real production process, stencil Gerber may be different from original PCB ECAD design. Test Expert supports importing additional solder mask layers Gerber to verify the contact of the nail position, and can reposition the covered test positions. In addition, the unique Net Link function of Test Expert can help quickly discover "connected" networks such as ohmic resistors, fuses, switches, etc., optimizing and merging networks, improving the coverage/testability. While maintaining the same testing coverage, it reduces the amount of nails and fixture cost.
Test Expert allows you to maintain multiple rule sets, and execute nail selection together, then compare testability difference and easily choose best result for fixture design & program generation.
ICT fixture design can be easily done in Test Expert with optimized nail path then output fixture data covering nails, CNC drill, nail path DXF and parts. Fixture reuse analysis is also available, helping to lower cost.
In Test Expert, two nets can be merged into one for 0 Ω resistor, switch, fuse. Through nets merge, testability can be improved while decrease nail quantity.
Back drills are very common in backplane and communication products. Back drills cannot be used as a test point for ICT and flying probe test. Test Expert can automatically identify and avoid back-drilling positions in test point analysis.
